Isolation regions such as shallow trench isolations (STIs) are used to provide expected isolation effect between adjacent semiconductor devices such as metal oxide semiconductor (MOS) devices. To improve performance of MOS devices, stress engineering such as application of silicon germanium (SiGe) source/drain regions is integrated into the MOS devices. In addition, continuous active area shared by adjacent MOS devices is proposed to further enhance performance of MOS devices. There is a need to provide sufficient isolation effect between the source/drain regions of adjacent MOS devices in a continuous active area.